1. Field of the Invention
The present invention relates to a switching power supply apparatus, and more particularly, to a switching power supply apparatus employing an RCC (ringing choke converter) system.
2. Description of the Related Art
In general, for equipment and apparatus such as CRT, facsimile equipment, and so forth, a stable direct current voltage is required. In order to supply a stable direct current voltage from a commercial alternating current power supply, a switching power supply apparatus is widely used employing an RCC system of which the configuration is relatively simple and the efficiency is high.
In FIG. 6, there is shown a conventional RCC system switching power supply apparatus. In FIG. 6, the switching power supply apparatus 1 is formed of an input circuit 2, an inverter circuit 3, a voltage detecting circuit 4, and a control circuit 5.
The input circuit 2 is made up of a rectifying diode bridge DB, an AC power supply, a fuse F provided between the AC power supply and the diode bridge DB, a line filter LF, and a smoothing capacitor C1 connected across the output terminals of the diode bridge DB.
The inverter circuit 3 is made up of a transformer T having a primary winding N1, a secondary winding N2 opposite in polarity to the primary winding N1, and a feedback winding Nb having the same polarity as the primary winding N1, FET Q1 as a switching element, connected in series with the other end of the primary winding N1, a starting-up resistor R1 connected between one end of the primary winding N1 and the gate of FET Q1 as a controlling terminal, a rectifying diode D1 connected in series with the other end of the secondary winding N2, and a smoothing capacitor C2 connected between the cathode of the diode D1 and one end of the secondary winding N2.
A voltage detecting circuit 4 provided on the output side of the inverter circuit 3 is made up of a resistor R2, a light emitting diode PD on the light emitting side of a photocoupler PC, a shunt regulator Sr, is resistors R3, R4 and a Zener diode Z1. The resistor R2, the light emitting diode PD, and the shunt regulator Sr are connected in series and provided in parallel with the capacitor C2 of the inverter circuit 3. The resistors R3, R4 are connected in series with one another, and provided in parallel to the capacitor C2. The Zener diode Z1 is provided in parallel with the capacitor C2. The node between the resistors R3, R4 is connected to the shunt regulator Sr.
The control circuit 5 is made up of a resistor R5 and a capacitor C3 connected in series with each other, provided between one end of the feedback winding Nb and the gate of FET Q1, a transistor Q2 connected between the gate of FET Q1 and the other end of the feedback winding Nb, a diode D2 with its anode connected to the one end of the feedback winding Nb, a resistor R6 connected between the cathode of the diode D2 and the base of the transistor Q2 as the controlling terminal, a capacitor C4 connected between the base of the transistor Q2 and the other end of the feedback winding Nb, a resistor R7 connected in parallel to the capacitor C4, a resistor R8 and a phototransistor PT on the light reception side of the photocoupler PC connected in series with each other, provided between the cathode of diode D2 and the base of the transistor Q2, a diode D3 with its cathode connected to the one end of the feedback winding Nb, a resistor R9 and a capacitor C5 connected in series with each other, provided between the anode of the diode D3 and the other end of the feedback winding Nb, and a resistor R10 connected between the node between the resistor R9 and the capacitor C5 and the base of the transistor Q2.
The operation of the switching power supply apparatus 1 shown in FIG. 6 will now be described with reference to the graph of FIG. 7 showing the change of voltage and current in the relevant respective portions of the switching power supply apparatus 1. In FIG. 7, Vgs, V1, I1, Vds, Vbe2, Vb, V2 and I2 represent, respectively, the gate--source voltage of FET Q1, a voltage applied to the primary winding N1, a current flowing in the primary winding N1, the drain--source voltage of FET Q1, the base--emitter voltage of the transistor Q2, a voltage produced in the feedback winding Nb, a voltage produced in the secondary winding N2 and a current flowing in the secondary winding N2. ON, OFF written at the top of the graph represent the timing when FET Q1 is turned from OFF to ON (hereinafter, referred to as "turn-on") and from ON to OFF (hereinafter, referred to as "turn-off").
First, at the instant that the power supply is turned on for starting up, FET Q1 is off, so that no current flows in the primary winding N1. At that time, a current flows into the internal capacitor formed between the gate--source of FET Q1, through the starting-up resistor R1. Thereby, the gate--source voltage Vgs of FET Q1 is raised. At the time when the voltage Vgs exceeds the threshold of FET Q1, FET Q1 begins to be turned on, and then, the drain--source voltage Vds of FET Q1 becomes nearly zero. As a result, a voltage from the power supply is applied to the primary winding N1 of the transformer T, causing the current: T1 to begin to flow. Thereby, voltages Vb, V2 are produced in the feedback winding Nb, and the secondary winding N2, respectively. The voltage Vb produced in the feedback winding Nb makes a current flow into the gate of FET Q1 from the feedback winding Nb through the resistor R5 and the capacitor C3. This accelerates the rising-up of the gate--source voltage Vgs of FET Q1, so that FET Q1 is completely turned on. In this case, no current flows in the secondary winding N2, since voltage V2 produced in the secondary winding N2 is in the backward direction with respect to the rectifying diode D1.
When FET Q1 is turned on and the voltage Vb positive in polarity is produced, the capacitor C4 is charged through the diode D2, the resistor R6, and the resistor R8 and the phototransistor PT as described below, so that the voltage across the opposite ends of the capacitor C4, namely, the base--emitter voltage Vbe 2 of the transistor Q2 is raised. In this case, the charging speed (time constant) is determined by the values of the resistors R6, R7, and R8, and the capacitor C4. When the base--emitter voltage Vbe2 of the transistor Q2 is raised to exceed a threshold of the transistor Q2, the transistor Q2 is turned on. When the transistor Q2 is turned on, the collector--emitter voltage of the transistor Q2, namely, the gate--source voltage Vgs of FET Q1 becomes nearly zero, acting on FET Q1 to be turned off.
When FET Q1 begins to be turned off, the voltage V1 applied to the primary winding N1 becomes zero, and also the current I1 flowing in the primary winding N1 becomes zero. However, voltages in the secondary winding N2, and the feedback winding Nb, reverse in polarity to those applied until then, are produced, due to magnetic energy stored in the transformer T, caused by the current I1 which has flown in the primary winding N1 in the on-state of FET Q1. The current I2, caused by the voltage V2 produced in the secondary winding N2, having the reverse polarity flows through the diode D1, and is smoothed in the capacitor C2 to be outputted. The voltage Vb generated in the feedback winding Nb, having the reverse polarity, rapidly absorbs the electric charge from the internal capacitor formed between the gate and the source of FET Q1, through the capacitor C3 and the resistor R5, turning FET Q1 completely off. At the same time, the voltage Vb (feedback winding Nb) absorbs the electric charge stored in the capacitor C4, through the resistors R10, R9 and the diode D3. However, since a voltage reverse in polarity is applied to the capacitor C4, the capacitor 4, after it is discharged, is charged in the reverse direction, and the base--emitter voltage Vbe 2 of the transistor Q2 is negatively biased, resulting in the turn-off of the transistor Q2. Thus, the transistor Q2 turns on only at the instant that it triggers the turn off of FET Q1.
While FET Q1 is off, the current I2 flowing in the secondary winding N2 is reduced stepwise with release of the magnetic energy from the transformer T, and finally becomes zero. When the current I2 flowing in the secondary winding N2 becomes zero, the voltages V2 and Vb generated in the secondary winding N2 and the feedback winding Nb, respectively if they are left as they are, tend to be damped, vibrating on the baseline of zero voltage. In this case, the voltage, of which the reverse polarity is temporarily changed to the positive polarity in the feedback winding Nb, is called a kick voltage. When the kick voltage is generated in the feedback winding Nb, a current flows into the internal capacitor formed between the gate and the source of FET Q1, from the feedback winding Nb through the resistor R5 and the capacitor C3, increasing the gate-source voltage Vgs of FET Q1. If the kick voltage is higher than a predetermined value, the gate--source voltage Vgs exceeds a threshold to turn FET Q1 on. At this time, less current flows in the starting-up resistor R1, since the starting resistor R1 is set to a high resistance. Accordingly, the current flowing in the starting-up resistor R1 has no function of turning FET Q1 on. When FET Q1 is turned on, the voltages V2 and Vb generated in the secondary winding N2 and the feedback winding Nb respectively, are forced to be enhanced to the positive polarity, so that the vibration of the voltage is forcedly stopped.
After the forced stopping, the same operation as in the starting-up is repeated. That is, FET Q1 is turned on and off repeatedly, and thus, the switching power supply apparatus operates. The capacitor C4 is charged reversely in polarity when FET Q1 is off. Therefore, it takes a longer time to charge the capacitor 4 to be positive again as compared with the time required for starting-up. Thus, the on-state time-period of FET Q1 is longer in the stationary state than at starting-up.
Lastly, the voltage stabilization operation will be described. The output power is divided by the resistors R3, R4 to be detected, and is inputted into the shunt regulator Sr. The shunt regulator Sr compares the inputted voltage with its internal reference voltage, and makes a current flow which is in correspondence to the difference between the compared voltages.
When a load (not shown) connected to the switching power supply apparatus 1 is light and the output voltage is raised, the voltage at the connection between the resistors R3, R4 is increased. As a result, the input voltage to the shunt regulator Sr is increased, making a larger current start to flow. With an increased current flowing in the shunt regulator Sr, the current flowing in the light emitting diode PD of the photocoupler PC, which is connected in series with the shunt regulator Sr, is increased, with the quantity of light emitting from the light emitting diode PD increasing. With increase of the quantity of light emitting from the light emitting diode PD, a current flowing in the phototransistor PT of the photocoupler PC connected to the controlling circuit 5, is increased. The current flowing in the phototransistor PT, together with the current flowing in the resistor R6 when the voltage Vb generated in the feedback winding Nb is positive in polarity as described above, acts to charge the capacitor C4. Accordingly, when the current flowing in the phototransistor PT is increased, the time taken to charge the capacitor C4 is shortened. As a result, the time taken until the transistor Q2 is turned on is shortened, and also the time until FET Q1 is turned off, that is, the time while the FET Q1 is on, is shortened. The shortened on-state time-period of the FET Q1 reduces the magnetic energy stored in the transformer T and the voltage V2 in the secondary winding N2, resulting in lowering of the output voltage. Since the off-state time-period of FET Q1 is not changed, the switching frequency of the switching power supply apparatus 1 is increased in correspondence to a decrement in the time-period while FET Q1 is on.
To the contrary, when the load (not shown) connected to the switching power supply apparatus 1 is heavier and the output power is reduced, the current flowing in the phototransistor PT of the photocoupler PC is decreased, so that the charging time of the capacitor C4 is prolonged. The time until FET Q1 is turned off, that is, the time while FET Q1 is on, becomes longer, the voltage V2 produced in the secondary winding N2 is enhanced, and the output voltage is increased. Since the on-state time-period of FET Q1 becomes longer, the switching frequency of the switching power supply apparatus 1 is reduced.
In the above-described manner, the switching power supply apparatus 1 attempts to stabilize the voltage.
In the event that the switching power supply apparatus 1 gets to be in its overload state, for example, caused by the fact that the load becomes short-circuited or the like, the output voltage is decreased. In order to compensate for the reduction of the output voltage, the control circuit 5 operates to reduce the current flowing in the phototransistor PT and prolong the on-state time-period of FET Q1 to raise the output voltage. However, even though the current flowing into the phototransistor PT becomes substantially absent, the on-state time-period of the FET Q1 does not become longer than a predetermined time-period, since there exists a current flowing into the capacitor C4 through the resistor R6. Accordingly, the output voltage is further reduced. The voltage produced in the feedback winding Nb and opposite in polarity to the voltage Vb is proportional to the voltage V2 produced in the secondary winding N2, that is, the output voltage. Therefore, as the output voltage is reduced, the voltage opposite in polarity to the voltage Vb is reduced. The voltage produced in the feedback winding Nb and opposite in polarity to the voltage Vb has a function of charging the capacitor C4 in the reverse direction so that the time taken until the transistor Q2 is turned on is prolonged, that is, it has a function of determining the time at which transistor Q2 is turned off. Accordingly, when the voltage having the opposite polarity becomes low, the time required to charge the capacitor C4 with the current through the resistor R6 becomes short, and the turn-off of FET Q1 is caused earlier, so that the time while FET Q1 is in its on state becomes short. As a result, the operation of the switching power supply 1, though the output voltage is low, is carried out at a high switching frequency, in the state that a large current (short-circuit current) flows there. This causes problems that the device may be damaged due to abnormal heating of FET Q1, the diode D1, and the load.
On the other hand, for example, in the event that the connection between the shunt regulator Sr and the photodiode PD, for example, is disconnected in the switching power supply apparatus 1, the feedback from the output voltage detecting circuit 4 to the controlling circuit 5 is not provided, and the current ceases to flows in the phototransistor PT. Accordingly, the time-period while FET Q1 is in its on state becomes abnormally long, resulting in the abnormally high output voltage (overvoltage). In this case, the load is so protected by the Zener diode Z1 that the output voltage is not raised to exceed a predetermined value. However, if the output voltage is further increased, the Zener diode Z1 itself becomes short-circuited. Accordingly, the output voltage is reduced as in the case of the overload, and a large current flows. This causes a problem that the circuit is damaged, due to the abnormal heating of FET Q1, the diode D1, and the load.